Data Sheets on RAIL Library Cells¶

The key idea of the RAIL project is to utilize the recent digitalized design trend in AMS blocks (like ADPLL/MDLL/DLDO/SADC, etc.). With the trend, we would like to limit the cell choice for AMS designs. Here, we define four categories, switches, delay cells, passives and custom defined cells. The RAIL library provide a reference designs for all these cells.